f4fd82bd7e
The driver is based on the construction of IL3820 (SSD1608), which is very similar from command point of view. It is tested on ESP32-S2 MCU and GoodDisplay GDEY029T94.
115 lines
4 KiB
C
115 lines
4 KiB
C
/**
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* @file ssd1680.h
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*
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*/
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#ifndef SSD1680_H
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#define SSD1680_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#ifdef LV_LVGL_H_INCLUDE_SIMPLE
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#include "lvgl.h"
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#else
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#include "lvgl/lvgl.h"
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#endif
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#include "sdkconfig.h"
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#define EPD_PANEL_WIDTH LV_HOR_RES_MAX /* 128 */
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#define EPD_PANEL_HEIGHT LV_VER_RES_MAX /* 296 */
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/* 128 = panel width */
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#define SSD1680_COLUMNS (EPD_PANEL_WIDTH / 8)
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#define SSD1680_DC_PIN CONFIG_LV_DISP_PIN_DC
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#define SSD1680_RST_PIN CONFIG_LV_DISP_PIN_RST
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#define SSD1680_USE_RST CONFIG_LV_DISP_USE_RST
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#define SSD1680_BUSY_PIN CONFIG_LV_DISP_PIN_BUSY
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#define SSD1680_BUSY_LEVEL 1 //chip is busy if the pin level is high
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/* SSD1680 commands */
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#define SSD1680_CMD_GDO_CTRL 0x01 //Driver output control
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#define SSD1680_CMD_GDV_CTRL 0x03
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#define SSD1680_CMD_SDV_CTRL 0x04
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#define SSD1680_CMD_SOFTSTART 0x0c
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#define SSD1680_CMD_GSCAN_START 0x0f
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#define SSD1680_CMD_SLEEP_MODE1 0x10 //enter deep sleep 1 - retain RAM
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#define SSD1680_CMD_SLEEP_MODE2 0x11 //enter deep sleep 2 - cannot retain RAM
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//After entering Deep sleep Mode, BUSY will stay high.
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//To Exit Deep Sleep a HWRESET should be sent.
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#define SSD1680_CMD_ENTRY_MODE 0x11 //Data entry mode
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#define SSD1680_CMD_SW_RESET 0x12 //SWRESET
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#define SSD1680_CMD_TSENS_CTRL 0x1a
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#define SSD1680_CMD_READ_INT_TEMP 0x18 //Read built-in temperature sensor
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#define SSD1680_CMD_MASTER_ACTIVATION 0x20 //Activate Display Update Sequence
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#define SSD1680_CMD_UPDATE_CTRL1 0x21 //Display update control
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#define SSD1680_CMD_UPDATE_CTRL2 0x22 //Display Update Control
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#define SSD1680_CMD_WRITE1_RAM 0x24 //Write Black (0) and Wite (1) image to RAM
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#define SSD1680_CMD_WRITE2_RAM 0x26 //Write RED (1) and NonRED (0) image to RAM
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#define SSD1680_CMD_VCOM_SENSE 0x28
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#define SSD1680_CMD_VCOM_SENSE_DURATON 0x29
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#define SSD1680_CMD_PRGM_VCOM_OTP 0x2a
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#define SSD1680_CMD_VCOM_VOLTAGE 0x2c
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#define SSD1680_CMD_PRGM_WS_OTP 0x30
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#define SSD1680_CMD_UPDATE_LUT 0x32
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#define SSD1680_CMD_PRGM_OTP_SELECTION 0x36
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#define SSD1680_CMD_WRITE_DISPL_OPT 0x37
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#define SSD1680_CMD_BWF_CTRL 0x3c //BorderWavefrom
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#define SSD1680_CMD_RAM_XPOS_CTRL 0x44 //set Ram-X address start/end position
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#define SSD1680_CMD_RAM_YPOS_CTRL 0x45 //set Ram-Y address start/end position
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#define SSD1680_CMD_RAM_XPOS_CNTR 0x4e //set RAM x address count to 0;
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#define SSD1680_CMD_RAM_YPOS_CNTR 0x4f //set RAM y address count to 0X199;
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/* Data entry sequence modes */
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#define SSD1680_DATA_ENTRY_MASK 0x07
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#define SSD1680_DATA_ENTRY_XDYDX 0x00
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#define SSD1680_DATA_ENTRY_XIYDX 0x01
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#define SSD1680_DATA_ENTRY_XDYIX 0x02
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#define SSD1680_DATA_ENTRY_XIYIX 0x03
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#define SSD1680_DATA_ENTRY_XDYDY 0x04
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#define SSD1680_DATA_ENTRY_XIYDY 0x05
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#define SSD1680_DATA_ENTRY_XDYIY 0x06
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#define SSD1680_DATA_ENTRY_XIYIY 0x07
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/* Options for display update */
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#define SSD1680_CTRL1_INITIAL_UPDATE_LL 0x00
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#define SSD1680_CTRL1_INITIAL_UPDATE_LH 0x01
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#define SSD1680_CTRL1_INITIAL_UPDATE_HL 0x02
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#define SSD1680_CTRL1_INITIAL_UPDATE_HH 0x03
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/* Options for display update sequence */
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#define SSD1680_CTRL2_ENABLE_CLK 0x80
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#define SSD1680_CTRL2_ENABLE_ANALOG 0x40
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#define SSD1680_CTRL2_TO_INITIAL 0x08
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#define SSD1680_CTRL2_TO_PATTERN 0x04
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#define SSD1680_CTRL2_DISABLE_ANALOG 0x02
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#define SSD1680_CTRL2_DISABLE_CLK 0x01
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#define SSD1680_SLEEP_MODE_DSM 0x01
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#define SSD1680_SLEEP_MODE_PON 0x00
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/* time constants in ms */
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#define SSD1680_RESET_DELAY 20 //At least 10ms delay
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#define SSD1680_BUSY_DELAY 1
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// normal wait time max 20 times x 10ms
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#define SSD1680_WAIT 20
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void ssd1680_init(void);
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void ssd1680_flush(lv_disp_drv_t *drv, const lv_area_t *area, lv_color_t *color_map);
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void ssd1680_rounder(lv_disp_drv_t * disp_drv, lv_area_t *area);
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void ssd1680_set_px_cb(lv_disp_drv_t * disp_drv, uint8_t* buf, lv_coord_t buf_w, lv_coord_t x, lv_coord_t y, lv_color_t color, lv_opa_t opa);
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void ssd1680_deep_sleep(void);
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif /* __SSD1680_REGS_H__ */
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