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Update to support ESP-IDF v5 in develop branch (#186)

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* Update to support ESP-IDF v5 in develop branch

* Remove the need for rom includes while providing IDF v5 compatibility

* Fix missing '(' typo

* Remove unnecessarily addded rom header files

* Add missing version include

* Fix another forgotten ')'
This commit is contained in:
Rashed Talukder 2022-05-12 20:15:06 -07:00 committed by GitHub
parent bd8a7e3edd
commit 8d9f6e2548
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GPG key ID: 4AEE18F83AFDEB23
15 changed files with 77 additions and 47 deletions
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17
lv_port/esp_lcd_backlight.c
View file

@ -11,6 +11,11 @@
#include "driver/gpio.h" #include "driver/gpio.h"
#include "esp_log.h" #include "esp_log.h"
#include "soc/ledc_periph.h" // to invert LEDC output on IDF version < v4.3 #include "soc/ledc_periph.h" // to invert LEDC output on IDF version < v4.3
#include "esp_idf_version.h"
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
#include "soc/gpio_sig_map.h"
#endif
typedef struct { typedef struct {
bool pwm_control; // true: LEDC is used, false: GPIO is used bool pwm_control; // true: LEDC is used, false: GPIO is used
@ -56,15 +61,25 @@ disp_backlight_h disp_backlight_new(const disp_backlight_config_t *config)
ESP_ERROR_CHECK(ledc_timer_config(&LCD_backlight_timer)); ESP_ERROR_CHECK(ledc_timer_config(&LCD_backlight_timer));
ESP_ERROR_CHECK(ledc_channel_config(&LCD_backlight_channel)); ESP_ERROR_CHECK(ledc_channel_config(&LCD_backlight_channel));
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_connect_out_signal(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert, 0);
#else
gpio_matrix_out(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert, 0); gpio_matrix_out(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert, 0);
#endif
} }
else else
{ {
// Configure GPIO for output // Configure GPIO for output
bckl_dev->index = config->gpio_num; bckl_dev->index = config->gpio_num;
gpio_pad_select_gpio(config->gpio_num);
ESP_ERROR_CHECK(gpio_set_direction(config->gpio_num, GPIO_MODE_OUTPUT)); ESP_ERROR_CHECK(gpio_set_direction(config->gpio_num, GPIO_MODE_OUTPUT));
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_pad_select_gpio(config->gpio_num);
esp_rom_gpio_connect_out_signal(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false);
#else
gpio_pad_select_gpio(config->gpio_num);
gpio_matrix_out(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false); gpio_matrix_out(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false);
#endif
} }
return (disp_backlight_h)bckl_dev; return (disp_backlight_h)bckl_dev;

20
lvgl_i2c/i2c_manager.c
View file

@ -66,8 +66,8 @@ static const uint8_t ACK_CHECK_EN = 1;
#define I2C_MANAGER_0_PULLUPS false #define I2C_MANAGER_0_PULLUPS false
#endif #endif
#define I2C_MANAGER_0_TIMEOUT ( CONFIG_I2C_MANAGER_0_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_0_TIMEOUT ( pdMS_TO_TICKS( CONFIG_I2C_MANAGER_0_TIMEOUT ) )
#define I2C_MANAGER_0_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_0_LOCK_TIMEOUT ( pdMS_TO_TICKS( CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT ) )
#endif #endif
@ -79,8 +79,8 @@ static const uint8_t ACK_CHECK_EN = 1;
#define I2C_MANAGER_1_PULLUPS false #define I2C_MANAGER_1_PULLUPS false
#endif #endif
#define I2C_MANAGER_1_TIMEOUT ( CONFIG_I2C_MANAGER_1_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_1_TIMEOUT ( pdMS_TO_TICKS( CONFIG_I2C_MANAGER_1_TIMEOUT ) )
#define I2C_MANAGER_1_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_1_LOCK_TIMEOUT ( pdMS_TO_TICKS( CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT ) )
#endif #endif
#define ERROR_PORT(port, fail) { \ #define ERROR_PORT(port, fail) { \
@ -222,7 +222,7 @@ esp_err_t I2C_FN(_read)(i2c_port_t port, uint16_t addr, uint32_t reg, uint8_t *b
} }
if (result != ESP_OK) { if (result != ESP_OK) {
ESP_LOGW(TAG, "Error: %d", result); ESP_LOGD(TAG, "Error: %d", result);
} }
ESP_LOG_BUFFER_HEX_LEVEL(TAG, buffer, size, ESP_LOG_VERBOSE); ESP_LOG_BUFFER_HEX_LEVEL(TAG, buffer, size, ESP_LOG_VERBOSE);
@ -244,12 +244,12 @@ esp_err_t I2C_FN(_write)(i2c_port_t port, uint16_t addr, uint32_t reg, const uin
TickType_t timeout = 0; TickType_t timeout = 0;
#if defined (I2C_ZERO) #if defined (I2C_ZERO)
if (port == I2C_NUM_0) { if (port == I2C_NUM_0) {
timeout = (CONFIG_I2C_MANAGER_0_TIMEOUT) / portTICK_RATE_MS; timeout = pdMS_TO_TICKS( CONFIG_I2C_MANAGER_0_TIMEOUT );
} }
#endif #endif
#if defined (I2C_ONE) #if defined (I2C_ONE)
if (port == I2C_NUM_1) { if (port == I2C_NUM_1) {
timeout = (CONFIG_I2C_MANAGER_1_TIMEOUT) / portTICK_RATE_MS; timeout = pdMS_TO_TICKS( CONFIG_I2C_MANAGER_1_TIMEOUT );
} }
#endif #endif
@ -271,7 +271,7 @@ esp_err_t I2C_FN(_write)(i2c_port_t port, uint16_t addr, uint32_t reg, const uin
} }
if (result != ESP_OK) { if (result != ESP_OK) {
ESP_LOGW(TAG, "Error: %d", result); ESP_LOGD(TAG, "Error: %d", result);
} }
ESP_LOG_BUFFER_HEX_LEVEL(TAG, buffer, size, ESP_LOG_VERBOSE); ESP_LOG_BUFFER_HEX_LEVEL(TAG, buffer, size, ESP_LOG_VERBOSE);
@ -294,12 +294,12 @@ esp_err_t I2C_FN(_lock)(i2c_port_t port) {
TickType_t timeout; TickType_t timeout;
#if defined (I2C_ZERO) #if defined (I2C_ZERO)
if (port == I2C_NUM_0) { if (port == I2C_NUM_0) {
timeout = (CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT) / portTICK_RATE_MS; timeout = pdMS_TO_TICKS( CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT );
} }
#endif #endif
#if defined (I2C_ONE) #if defined (I2C_ONE)
if (port == I2C_NUM_1) { if (port == I2C_NUM_1) {
timeout = (CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT) / portTICK_RATE_MS; timeout = pdMS_TO_TICKS( CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT );
} }
#endif #endif

5
lvgl_tft/FT81x.c
View file

@ -2,6 +2,7 @@
#include <stdio.h> #include <stdio.h>
#include "driver/gpio.h" #include "driver/gpio.h"
#include "esp_idf_version.h"
#include "FT81x.h" #include "FT81x.h"
@ -263,7 +264,11 @@ void TFT_bitmap_display(void)
void FT81x_init(void) void FT81x_init(void)
{ {
#if EVE_USE_PDN #if EVE_USE_PDN
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_pad_select_gpio(EVE_PDN);
#else
gpio_pad_select_gpio(EVE_PDN); gpio_pad_select_gpio(EVE_PDN);
#endif
#endif #endif
gpio_set_level(EVE_CS, 1); gpio_set_level(EVE_CS, 1);

6
lvgl_tft/GC9A01.c
View file

@ -121,7 +121,7 @@ void GC9A01_init(void)
GC9A01_send_cmd(GC_init_cmds[cmd].cmd); GC9A01_send_cmd(GC_init_cmds[cmd].cmd);
GC9A01_send_data(GC_init_cmds[cmd].data, GC_init_cmds[cmd].databytes&0x1F); GC9A01_send_data(GC_init_cmds[cmd].data, GC_init_cmds[cmd].databytes&0x1F);
if (GC_init_cmds[cmd].databytes & 0x80) { if (GC_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -235,8 +235,8 @@ static void GC9A01_reset(void)
#if GC9A01_USE_RST #if GC9A01_USE_RST
//Reset the display //Reset the display
gpio_set_level(GC9A01_RST, 0); gpio_set_level(GC9A01_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(GC9A01_RST, 1); gpio_set_level(GC9A01_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

6
lvgl_tft/hx8357.c
View file

@ -176,7 +176,7 @@ void hx8357_init(void)
} }
} }
if (x & 0x80) { // If high bit set... if (x & 0x80) { // If high bit set...
vTaskDelay(numArgs * 5 / portTICK_RATE_MS); // numArgs is actually a delay time (5ms units) vTaskDelay(numArgs * pdMS_TO_TICKS(5)); // numArgs is actually a delay time (5ms units)
} }
} }
@ -278,8 +278,8 @@ static void hx8357_reset(void)
{ {
#if HX8357_USE_RST #if HX8357_USE_RST
gpio_set_level(HX8357_RST, 0); gpio_set_level(HX8357_RST, 0);
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(10));
gpio_set_level(HX8357_RST, 1); gpio_set_level(HX8357_RST, 1);
vTaskDelay(120 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(120));
#endif #endif
} }

8
lvgl_tft/il3820.c
View file

@ -249,14 +249,14 @@ static void il3820_waitbusy(int wait_ms)
{ {
int i = 0; int i = 0;
vTaskDelay(10 / portTICK_RATE_MS); // 10ms delay vTaskDelay(pdMS_TO_TICKS(10)); // 10ms delay
for(i = 0; i < (wait_ms * 10); i++) { for(i = 0; i < (wait_ms * 10); i++) {
if(gpio_get_level(IL3820_BUSY_PIN) != IL3820_BUSY_LEVEL) { if(gpio_get_level(IL3820_BUSY_PIN) != IL3820_BUSY_LEVEL) {
return; return;
} }
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(10));
} }
LV_LOG_ERROR("Busy exceeded %dms", i*10 ); LV_LOG_ERROR("Busy exceeded %dms", i*10 );
@ -404,9 +404,9 @@ static void il3820_reset(void)
#if IL3820_USE_RST #if IL3820_USE_RST
/* Harware reset */ /* Harware reset */
gpio_set_level( IL3820_RST_PIN, 0); gpio_set_level( IL3820_RST_PIN, 0);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(IL3820_RESET_DELAY));
gpio_set_level( IL3820_RST_PIN, 1); gpio_set_level( IL3820_RST_PIN, 1);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(IL3820_RESET_DELAY));
#endif #endif
/* Software reset */ /* Software reset */

6
lvgl_tft/ili9163c.c
View file

@ -144,7 +144,7 @@ void ili9163c_init(void)
ili9163c_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes & 0x1F); ili9163c_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes & 0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) if (ili_init_cmds[cmd].databytes & 0x80)
{ {
vTaskDelay(150 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(150));
} }
cmd++; cmd++;
} }
@ -239,9 +239,9 @@ static void ili9163c_reset(void)
{ {
#if CONFIG_LV_DISP_USE_RST #if CONFIG_LV_DISP_USE_RST
gpio_set_level(ILI9163C_RST, 0); gpio_set_level(ILI9163C_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9163C_RST, 1); gpio_set_level(ILI9163C_RST, 1);
vTaskDelay(150 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(150));
#else #else
#endif #endif
} }

8
lvgl_tft/ili9481.c
View file

@ -81,7 +81,7 @@ void ili9481_init(void)
ili9481_send_cmd(ili_init_cmds[cmd].cmd); ili9481_send_cmd(ili_init_cmds[cmd].cmd);
ili9481_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9481_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -195,12 +195,12 @@ static void ili9481_reset(void)
{ {
#if ILI9481_USE_RST #if ILI9481_USE_RST
gpio_set_level(ILI9481_RST, 0); gpio_set_level(ILI9481_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9481_RST, 1); gpio_set_level(ILI9481_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#else #else
// Exit sleep, software reset // Exit sleep, software reset
ili9481_send_cmd(0x01); ili9481_send_cmd(0x01);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

6
lvgl_tft/ili9486.c
View file

@ -73,7 +73,7 @@ void ili9486_init(void)
ili9486_send_cmd(ili_init_cmds[cmd].cmd); ili9486_send_cmd(ili_init_cmds[cmd].cmd);
ili9486_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9486_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -169,8 +169,8 @@ static void ili9486_reset(void)
{ {
#if ILI9486_USE_RST #if ILI9486_USE_RST
gpio_set_level(ILI9486_RST, 0); gpio_set_level(ILI9486_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9486_RST, 1); gpio_set_level(ILI9486_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

12
lvgl_tft/ra8875.c
View file

@ -284,21 +284,21 @@ void ra8875_sleep_in(void)
ra8875_configure_clocks(false); ra8875_configure_clocks(false);
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
ra8875_write_cmd(RA8875_REG_PWRR, 0x02); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x02); // Power and Display Control Register (PWRR)
} }
void ra8875_sleep_out(void) void ra8875_sleep_out(void)
{ {
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
ra8875_configure_clocks(true); ra8875_configure_clocks(true);
disp_spi_change_device_speed(-1); disp_spi_change_device_speed(-1);
ra8875_write_cmd(RA8875_REG_PWRR, 0x80); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x80); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
} }
uint8_t ra8875_read_cmd(uint8_t cmd) uint8_t ra8875_read_cmd(uint8_t cmd)
@ -331,7 +331,7 @@ void ra8875_configure_clocks(bool high_speed)
vTaskDelay(1); vTaskDelay(1);
ra8875_write_cmd(RA8875_REG_PCSR, PCSR_VAL); // Pixel Clock Setting Register (PCSR) ra8875_write_cmd(RA8875_REG_PCSR, PCSR_VAL); // Pixel Clock Setting Register (PCSR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
} }
static void ra8875_set_window(unsigned int xs, unsigned int xe, unsigned int ys, unsigned int ye) static void ra8875_set_window(unsigned int xs, unsigned int xe, unsigned int ys, unsigned int ye)
@ -370,8 +370,8 @@ static void ra8875_reset(void)
{ {
#if RA8875_USE_RST #if RA8875_USE_RST
gpio_set_level(RA8875_RST, 0); gpio_set_level(RA8875_RST, 0);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(100, portTICK_PERIOD_MS));
gpio_set_level(RA8875_RST, 1); gpio_set_level(RA8875_RST, 1);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(100, portTICK_PERIOD_MS));
#endif #endif
} }

6
lvgl_tft/sh1107.c
View file

@ -102,7 +102,7 @@ void sh1107_init(void)
sh1107_send_cmd(init_cmds[cmd].cmd); sh1107_send_cmd(init_cmds[cmd].cmd);
sh1107_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F); sh1107_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) { if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -250,8 +250,8 @@ static void sh1107_reset(void)
{ {
#if SH1107_USE_RST #if SH1107_USE_RST
gpio_set_level(SH1107_RST, 0); gpio_set_level(SH1107_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(SH1107_RST, 1); gpio_set_level(SH1107_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

6
lvgl_tft/st7735s.c
View file

@ -109,7 +109,7 @@ void st7735s_init(void)
st7735s_send_cmd(init_cmds[cmd].cmd); st7735s_send_cmd(init_cmds[cmd].cmd);
st7735s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F); st7735s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) { if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -219,9 +219,9 @@ static void st7735s_reset(void)
{ {
#if ST7735S_USE_RST #if ST7735S_USE_RST
gpio_set_level(ST7735S_RST, 0); gpio_set_level(ST7735S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ST7735S_RST, 1); gpio_set_level(ST7735S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

6
lvgl_tft/st7796s.c
View file

@ -92,7 +92,7 @@ void st7796s_init(void)
st7796s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes & 0x1F); st7796s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes & 0x1F);
if (init_cmds[cmd].databytes & 0x80) if (init_cmds[cmd].databytes & 0x80)
{ {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
} }
cmd++; cmd++;
} }
@ -203,8 +203,8 @@ static void st7796s_reset(void)
{ {
#if ST7796S_USE_RST #if ST7796S_USE_RST
gpio_set_level(ST7796S_RST, 0); gpio_set_level(ST7796S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ST7796S_RST, 1); gpio_set_level(ST7796S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(100));
#endif #endif
} }

10
lvgl_touch/adcraw.c
View file

@ -8,6 +8,7 @@
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
#include "freertos/task.h" #include "freertos/task.h"
#include "driver/gpio.h" #include "driver/gpio.h"
#include "esp_idf_version.h"
#include <stddef.h> #include <stddef.h>
#if CONFIG_LV_TOUCH_CONTROLLER_ADCRAW #if CONFIG_LV_TOUCH_CONTROLLER_ADCRAW
@ -138,10 +139,19 @@ static void setup_axis(gpio_num_t plus, gpio_num_t minus, gpio_num_t measure, gp
{ {
// Set GPIOs: // Set GPIOs:
// - Float "ignore" and "measure" // - Float "ignore" and "measure"
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_pad_select_gpio(ignore);
#else
gpio_pad_select_gpio(ignore); gpio_pad_select_gpio(ignore);
#endif
gpio_set_direction(ignore, GPIO_MODE_DISABLE); gpio_set_direction(ignore, GPIO_MODE_DISABLE);
gpio_set_pull_mode(ignore, GPIO_FLOATING); gpio_set_pull_mode(ignore, GPIO_FLOATING);
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_pad_select_gpio(ignore);
#else
gpio_pad_select_gpio(measure); gpio_pad_select_gpio(measure);
#endif
gpio_set_direction(measure, GPIO_MODE_DISABLE); gpio_set_direction(measure, GPIO_MODE_DISABLE);
gpio_set_pull_mode(measure, GPIO_FLOATING); gpio_set_pull_mode(measure, GPIO_FLOATING);
// - Set "plus" to 1, "minus" to 0 // - Set "plus" to 1, "minus" to 0

2
lvgl_touch/stmpe610.c
View file

@ -60,7 +60,7 @@ void stmpe610_init(void)
// Attempt a software reset // Attempt a software reset
write_8bit_reg(STMPE_SYS_CTRL1, STMPE_SYS_CTRL1_RESET); write_8bit_reg(STMPE_SYS_CTRL1, STMPE_SYS_CTRL1_RESET);
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(pdMS_TO_TICKS(10));
// Reset the SPI configuration, making sure auto-increment is set // Reset the SPI configuration, making sure auto-increment is set
u8 = read_8bit_reg(STMPE_SPI_CFG); u8 = read_8bit_reg(STMPE_SPI_CFG);